1. Technical Filed
The present application relates to a semiconductor device.
2. Description of the Related Art
LSIs (large scale integrated circuit) having a so-called power-gating function, which is a function for disconnecting power source partially in an internal circuit to reduce power consumption, are becoming commonplace.
LSIs having power-gating functions are designed to perform restoring of power voltage of the internal circuit within a predetermined period of time. However, if the restoring time is short, current suddenly flows to a stability capacity provided along with the internal circuit upon restoring from a power-disconnected state to a power-connected state, so power noise occurs in a power line connected to the internal circuit. Thus, designs for LSIs having a power-gating function require suppressing or preventing of the occurrence of power noise which might lead to erroneous operation of the LSI.
In order to shorten the time for restoring power, a discussion has been made in Japanese Laid-open Patent Publication No. 2005-175269, wherein the voltage of the power line in the internal circuit is sharply increased by connecting a pre-charged capacity power line to the power line in the internal circuit.
In addition, proposals such as those below have been made relating to suppressing or preventing the occurrence of power noise, (e.g., “90 nm Low Leakage SoC Design Techniques for Wireless Applications”, ISSCC Dig. Tech. Papers, Paper 7.6, pp. 138-139, February, 2005 and “Hierarchical Power Distribution with 20 Power Domains in 90-nm Low-Power Multi-CPU Processor”, ISSCC Dig. Tech. Papers, Paper 29.4, pp. 540-541, February, 2006). “90 nm Low Leakage SoC Design Techniques for Wireless Applications”, ISSCC Dig. Tech. Papers, Paper 7.6, pp. 138-139, February, 2005 discusses a method to gradually increase the potential of the internal power line by providing a power switch with a low current supply capability, and a power switch with a high current supply capability, between the internal power line and the power line with voltage constantly maintained, and turning on the switches in sequence from the switch with the low current supply capability. In addition, “Hierarchical Power Distribution with 20 Power Domains in 90-nm Low-Power Multi-CPU Processor”, ISSCC Dig. Tech. Papers, Paper 29.4, pp. 540-541, February, 2006) discusses a method whereby, in order to drive a control line of the power switch connecting between the internal power line and the power line with voltage constantly maintained, a transistor with a weak driving capability and a transistor with a strong driving capability is connected to the control line of the power switch, whereby a control signal is gradually raised by the transistor having the weak driving function, and thereafter the control signal is raised with the transistor having the strong driving capability. This is to suppress the current supply capability of the power switch by gradually activating the control signal potential in order to suppress sudden current from flowing into the power line of the internal circuit.
There is a problem in that power noise occurs due to shortening the time for power line voltage in the internal circuit to be restored in typical LSI.
In addition, there is a problem in that the restoring time of power voltage in the internal circuit is lengthened by suppressing the current flowing between the power line maintaining constant voltage and the power line in the internal circuit, and by suppressing the occurrence of power noise in typical LSI.